Chip-Interleaved DSSS for Energy-Efficient Physical Layer Encryption - Institut Polytechnique de Paris Access content directly
Conference Papers Year : 2023

Chip-Interleaved DSSS for Energy-Efficient Physical Layer Encryption

Abstract

Traditional methods for ensuring secure communications typically rely on encryption, which necessitates some form of coordination between the transmitter and the receiver. The Direct Sequence Spread Spectrum modulation can introduce some security at the physical layer but this technique must be combined with other technologies. Physical layer encryption techniques offer an alternative approach by taking advantage of transmit arrays to introduce beamformed noise. These techniques guarantee a certain level of confidentiality without requiring neither a heavy coordination nor losing time for secret key establishment, which make these techniques very attractive in particular for military and secured communications. However, the proposed solutions in the literature suffer from several limitations, and in particular, poor energy efficiency. To address this issue, we propose an original solution for physical layer encryption that does not spoil any energy with a signal mask by taking advantage of the wiretap channel inherent degradation introduced by the spatial chip interleaving over the transmitter antennas. Our simulations confirm that our proposal guarantees a considerable level of confidentiality without any energy loss.
Fichier principal
Vignette du fichier
MILCOM 1570923666 final .pdf (4.49 Mo) Télécharger le fichier
Origin Files produced by the author(s)

Dates and versions

hal-04207949 , version 1 (14-09-2023)

Identifiers

  • HAL Id : hal-04207949 , version 1

Cite

Clément Leroy, Tarak Arbi, Oudomsack Pierre Pasquero, Benoit Geller. Chip-Interleaved DSSS for Energy-Efficient Physical Layer Encryption. MILCOM, Oct 2023, Boston (Massachusetts), United States. ⟨hal-04207949⟩
57 View
63 Download

Share

Gmail Mastodon Facebook X LinkedIn More